(a) Field of the Invention
The invention relates to electronic semiconductor devices, and, more particularly, to capacitor and memory structures and fabrication methods for such structures.
(b) Description of the Related Art
High density integrated circuit memories have density dominated by cell size; thus alternative capacitor dielectrics such as high dielectric constant para-electrics for dynamic memory (DRAM) and ferroelectrics for nonvolatile ferroelectric memory (FeRAM) have recently received intense investigation. The para-electrics currently being investigated include barium strontium titanate (BST) and tantalum pentoxide (Ta2O5) and the ferroelectrics include strontium bismuth tantalate (SBT) and lead zirconate titanate (PZT). See for example, Hintermaier et al, Properties of SrBi2Ta2O5 Thin Films Grown by MOCVD for High Density FeRAM, 1998 Symp. VLSl Tech. Dig. 56.
However, memories with these new dielectrics have manufacturing problems.
The present invention provides fabrication for paraelectric and ferroelectric capacitors, and includes multi-step stack etches with remote endpoint detection for step transitions.
This has the advantages of manufacturability for paraelectric and ferroelectric capacitors with metal oxide dielectrics such as PZT, BST, and SBT.